Products

xISS Fast Instruction Set Simulator

200+ MIPS Performance to Speed Software Development

ARC xISS and ARC xISS Turbo are high-performance instruction-set level simulations that increase software development productivity at every stage of ARC-Based product development.

ARC xISS Turbo uses advanced Just-in-Time Compiler technology to produce 200+ MIPS (millions of instructions per second) performance, while ARC xISS provides affordable yet advanced ISS capability at ~20 MIPS performance. Whatever the project phase, ARC xISS products enable programming teams to meet challenging time-to-market requirements.

Benefits

Accelerate Time to Market

• Never wait for boards - Engage your software team early in the development process
• Quickly iterate through multiple system configurations to determine the best options for your requirements
• Increase the number of develop/debug/optimize cycles to ensure your product meets your requirements

Increase Developer Productivity

• Less waiting - Fast (200+ MHz) simulation for software development and tuning
• Integrated with software debuggers including GDB and the MetaWare Debugger
• Configured with processor choices made in the ARChitect Processor Configurator

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ARC® xISS Turbo Flow Diagram

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Debugger Integration for Productivity in Profiling and Verification

ARC® xISS seamlessly works with GDB and the MetaWare® Debugger. The debugger invokes a xISS simulation as a target: The xISS simulation operates within the debugger just as other hardware or software targets do, providing a stable and productive development platform.

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